Although our primary research interests are in the fields of High Performance and Distributed Computing, we also perform related work in a number of additional areas. Brief overviews of our projects to date are presented below; for detailed information, please see the publications section.
Condensed Graphs is a graph-based model of computation developed by Prof. John Morrison. Although superficially similar to classical dataflow in that computations are represented by directed acyclic graphs, the Condensed Graphs Model is unique because it allows three different evaluation strategies (availability-driven, coercion-driven and control-driven) to incorporated within the same computation. As a result, various sections of a computation may execute in strict sequential order (control-driven), eagerly attempt to evaluate all available execution paths in a speculative fashion (availability-driven), or lazily perform work only when absolutely necessary (coercion-driven).
WebCom is a metacomputing environment that has been under development at the CUC for almost a decade. WebCom began as a Java implementation of the Condensed Graphs Model but has since been expanded into a fully featured distributed computing platform and workflow enactment system that includes advanced functionality such as automatic load balancing, fault tolerance and resource-based targeting. An IDE has been developed to simplify the task of developing applications for WebCom using the Condensed Graphs Model. WebCom was originally developed by David Power, James Kennedy and John Morrison but has been contributed to in some respect by practically every member of the CUC.
WebCom-G is a candidate Grid Operating System, designed to provide independent service access through interoperability with existing middlewares. Composed of a set of extensions to the exisitng WebCom metacomputing environment, it offers an expressive programming model that automatically handles task synchronisation - load balancing, fault tolerance, and task allocation are handled at the WebCom-G system level - without burdening the application writer. These characteristics, together with the ability of its computing model to mix evaluation strategies to match the characteristics of the geographically dispersed facilities and the overall problem-solving environment, make WebCom-G a promising grid middleware candidate.
This project advocates using the unified computing technology, to create Anyware: a novel software architecture based on the Condensed Graphs model of computation. An important part of Anyware is an Enterprise Development Kit (EDK) that can be used to graphically create applications by directly manipulating functional components consisting of business objects, legacy applications and commmercial off-the-shelf (COTS) components. Furthermore, the unified model ensures transparent distributed execution of the resulting application. Present CUC tools allow applications to be targeted at specific machines and even to consume spare computing cycles on a company Intranet. For business-to-business applications, Anyware supports design diversity and is capable of providing seamless interoperability between existing middleware via the Internet. In that application, Anyware provides an abstraction of middleware in which business rules and business objects are separated from, but can leverage, all underlying service providers.
Secure WebCom provides a trust management based architecture for the WebCom metacomputing environment. The security architecture is independent of the underlying application code, providing the separation of security and functional concerns. To have more complete control over a computational component, you must be able to name all aspects of it. To address this, Secure WebCom incorporates a naming architecture that provides a means to capture the needed detail to address fine-grained security policies. These WebCom names facilitate control over the individual fragments of distributed applications. Depending on the security policies defined by the compute resources, the computation may be restricted based on, for example, the application, the functional type of computational fragments, the input data, the result data and the historical path of execution. The naming architecture allows a systematic way to name, and therefore control, authorisation for a variety of Middlewares. This work was performed by Simon Foley, Thomas Quillinan and Barry Mulcahy.
Grids operate on the principle that participants are expected to donate their resources in exchange for access to the resources of others. Complications can arise when those donating resources do not wish to share with others who are unwilling or unable to donate resources themselves. Adarsh Patil is developing economic models that allow the quality of service that users receive depend on their contribution of resources to the grid. Consumers therefore have an incentive to share, and those who do share are rewarded with better quality of service. Net consumers who are unable to share may improve their quality of service through monetary donations, and net donators can receive payment to reimburse them for overheads incurred.
Cyclone is a cycle-harvesting and brokering system developed by Keith Power
and Neil Cafferkey. It allows the idle cycles of
networks of workstations to be exploited by WebCom and other applications. It
consists of a control server and services installed on each client. The client
services monitor and report the client load, detect whether the machine has
entered a screensaver state and listen for commands from the control server. The
control server allows a user to control any connected clients via a simple GUI.
This interface lets a user specify a special type of executable Java class,
known as a Payload, which can be sent to some or all clients. Clients can also
be instructed to run in one of four modes: In
ARC (Accessible Reconfigurable Computing) is a metacomputing environment for clusters augmented with reconfigurable hardware (FPGAs) developed by Philip Healy. Writing applications that target distributed reonfigurable computing resources using current techniques can result in large, complex applications cluttered with calls to message passing libraries and FPGA board drivers. This is particularly the case when the application does not decompose neatly into a set of identical parallel subtasks, requiring the implementation of a load balancing scheme. ARC allows the three distinct steps in the creation of such applications (specification of high-level parallelism, implementation of application logic and acceleration of parts of the logic using reconfigurable hardware) to be performed separately using the most appropriate tool for each. At runtime, tasks are distributed and executed automatically, and complex load balancing behaviour is performed without any intervention required on the part of the application developer.